Job title: SDE-II FPGA
Job description: As a member of Azure Synapse Big Data team, you will drive, design & architect, develop, test, and maintain distributed, large scale applications using Spark, Azure Data Lake, Azure Cosmos DB as well as any emerging and relevant platforms. As a FPGA developer, you will work on the Data Analytics Acceleration using FPGA technology.
You’ll work in the application of FPGA technologies to large scale deployments in a continuous effort to deliver a world-class customer experience. We are looking for an individual who can work with architects, HW/SW developers and can quickly ramp up to solve pressing issues. This is a fast-paced, intellectually challenging position, and you’ll work with thought-leaders in multiple technology areas. You’ll have relentlessly high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve our products’ performance, quality and TCO.
- Design FPGA based acceleration using HLS/C++/Verilog/System Verilog
- Develop system level specification and architecture
- Develop system level register specification and programming model
- Develop module level specification and micro-architecture
- Perform unit level and system level validation by preparing test plan
- Perform verification coverage runs, analyze reports and identify verification holes to develop new tests
- Perform Floorplanning, Physical optimization, Static Timing analysis, and timing closure
- Debug, root cause analysis & troubleshooting of complex FPGA design at full system level in the Azure cloud
- B.S, in Electrical Engineering, Computer Engineering or Computer Science
- 4+ years of industry experience
- 2+ years of industry FPGA/ASIC engineering experience
- Experience in building FPGA based systems using HLS/C++/Verilog/System Verilog
- Experience with at least one OOP language: C++/C#/Java
- Great design, problem solving, and data analysis skills, with demonstrated passion for quality, performance, and engineering excellence
- Motivated and able to work independently as well in a collaborative team setting to research innovative solutions to challenging technical/business problems
- Good communication skills
- M.S in Electrical Engineering, Computer Engineering or Computer Science
- 2+ years of experience in building FPGA based systems using HLS/C++/OpenCL is a big plus
- 2+ years of experience in building FPGA based CAD tools using C/C++
- Experience in running latest Xilinx/Intel FPGA tools is a big plus
- Hands on with lab FPGA debug tools (JTAG, SignalTap/Chipscope/LogicAnalyzer) is a big plus
- Knowledgeable in one or more industry standard interfaces such as AMBA AXI, Altera Avalon, PCIe, HBM, and DDR4 is preferred
- Thorough understanding of digital logic design concepts, and multiple clock domain designs
- Good understanding of X86 Architecture and DMA concepts
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the .
Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.
Location: Bangalore, Karnataka
Job date: Sat, 29 Jan 2022 00:17:10 GMT
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