Job title: ASIC Auto Place and Route Lead
Job description: Job Description This position is within the Design Enablement (DE) which is one of the key pillars enabling Intel to deliver winning products in the marketplace. As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly
Job Description This position is within the Design Enablement (DE) which is one of the key pillars enabling Intel to deliver winning products in the marketplace. As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems enabling PDKs for Intel’s most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers. The Process Development kit (PDK) Customer Support team within this organization is looking for Customer Obsessed individual in the area of ASIC Auto Place and Route (APR) support to provide a positive experience to our customers. The candidate would be expected to help resolve the customer issues they see while using the PDK collateral in APR tools. In addition, the candidate would prepare training material to inform and educate customers on PDK collateral usage. Behavior traits: Proven track record of uncompromising customer orientation to deliver leading-edge solutions Debugging skills to root cause the customer issue and propose solutions Be fearless in bringing the voice of the customer to the PDK team and ability to lead and facilitate meetings with customers and PDK team to ensure timely resolution of customer issues Thrive in a fast paced, challenging environment Detail oriented Verbal communication, technical writing skills, and presentation skills. Qualifications Minimum Qualifications: 6+ years of relevant experience with Bachelor of Science in Electrical Engineering, Computer Engineering, or relevant scientific STEM major or MS with 5+ of relevant experience in the following areas: ASIC flow knowledge of using either of Synopsys Fusion Compiler or Cadence Innovus Static timing analysis, synthesis, APR and physical verification Intel and/or external foundry process technology knowledge in advance nodes Inside this Business Group Legal Disclaimer: Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status. It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at and not fall prey to unscrupulous elements.
Location: Bangalore, Karnataka
Job date: Sat, 22 Jan 2022 23:51:35 GMT
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