PDK customer support for Physical Layout Verification


Job title: PDK customer support for Physical Layout Verification

Company: Intel

Job description: About our organization This position is within the Design Enablement (DE) which is one of the key pillars enabling Intel to deliver winning products in the marketplace. As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems enabling PDKs for Intel’s most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers.About the roleThe Process Development kit (PDK) Customer Support team within this organization is looking for Customer Obsessed individual in the area of Physical Layout Verification support to provide a positive experience to our customers. The candidate would be expected to help resolve the customer issues they see while using the PDK collateral in physical layout verification tools. In addition, the candidate would prepare training material to inform and educate customers on PDK collateral usage.The successful candidate should exhibit the following behavioral traits:Proven track record of uncompromising customer orientation to deliver leading-edge solutionsDebugging skills to root cause the customer issue and propose solutionsBe fearless in bringing the voice of the customer to the PDK team and ability to lead and facilitate meetings with customers and PDK team to ensure timely resolution of customer issuesThrive in a fast paced, challenging environmentDetail orientedVerbal communication, technical writing skills, and presentation skills.


You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Minimum Required Qualifications: Bachelor of Science in Electrical Engineering, Computer Engineering, or relevant scientific STEM major with 4+ years of professional experience or MS with 3+ of professional experience in the following areas: Physical layout verification knowledge in at least one of the following: Synopsys IC Verification, Siemens/Mentor Calibre Resolving DRC/LVS/density issues Process layout design rule from DRM (Design Rule Manuals) Runset development Preferred: Intel and/or external foundry process technology knowledge in advance nodes Inside this Business Group

As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art — from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

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INExperienced HireJR0220621BangaloreTechnology and Manufacturing

Expected salary:

Location: Bangalore, Karnataka

Job date: Fri, 29 Apr 2022 07:46:51 GMT

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